Computers include general purpose central processing units (CPUs) that are designed to execute a specific set of system instructions. A group of processors that have similar architecture or design specifications may be considered to be members of the same processor family. Examples of current processor families include the Motorola 680X0 processor family, manufactured by Motorola, Inc. of Phoenix, Ariz.; the Intel 80X86 processor family, manufactured by Intel Corporation of Sunnyvale, Calif.; and the PowerPC processor family, which is manufactured by Motorola, Inc. and used in computers manufactured by Apple Computer, Inc. of Cupertino, Calif. Although a group of processors may be in the same family because of their similar architecture and design considerations, processors may vary widely within a family according to their clock speed and other performance parameters.
Each family of microprocessors executes instructions that are unique to the processor family. The collective set of instructions that a processor or family of processors can execute is known as the processor's instruction set. As an example, the instruction set used by the Intel 80X86 processor family is incompatible with the instruction set used by the PowerPC processor family. The Intel 80X86 instruction set is based on the Complex Instruction Set Computer (CISC) format. The Motorola PowerPC instruction set is based on the Reduced Instruction Set Computer (RISC) format. CISC processors use a large number of instructions, some of which can perform rather complicated functions, but which require generally many clock cycles to execute. RISC processors use a smaller number of available instructions to perform a simpler set of functions that are executed at a much higher rate.
The uniqueness of the processor family among computer systems also typically results in incompatibility among the other elements of hardware architecture of the computer systems. A computer system manufactured with a processor from the Intel 80X86 processor family will have a hardware architecture that is different from the hardware architecture of a computer system manufactured with a processor from the PowerPC processor family. Because of the uniqueness of the processor instruction set and a computer system's hardware architecture, application software programs are typically written to run on a particular computer system running a particular operating system.
Computer manufacturers want to maximize their market share by having more rather than fewer applications run on the microprocessor family associated with the computer manufacturers' product line. To expand the number of operating systems and application programs that can run on a computer system, a field of technology has developed in which a given computer having one type of CPU, called a host, will include an emulator program that allows the host computer to emulate the instructions of an unrelated type of CPU, called a guest. Thus, the host computer will execute an application that will cause one or more host instructions to be called in response to a given guest instruction. Thus the host computer can both run software design for its own hardware architecture and software written for computers having an unrelated hardware architecture. As a more specific example, a computer system manufactured by Apple Computer, for example, may run operating systems and program written for PC-based computer systems. It may also be possible to use an emulator program to operate concurrently on a single CPU multiple incompatible operating systems. In this arrangement, although each operating system is incompatible with the other, an emulator program can host one of the two operating systems, allowing the otherwise incompatible operating systems to run concurrently on the same computer system.
When a guest computer system is emulated on a host computer system, the guest computer system is said to be a “virtual machine” as the guest computer system only exists in the host computer system as a pure software representation of the operation of one specific hardware architecture. The terms emulator, virtual machine, and processor emulation are sometimes used interchangeably to denote the ability to mimic or emulate the hardware architecture of an entire computer system. As an example, the Virtual PC software created by Connectix Corporation of San Mateo, California emulates an entire computer that includes an Intel 80X86 Pentium processor and various motherboard components and cards. The operation of these components is emulated in the virtual machine that is being run on the host machine. An emulator program executing on the operating system software and hardware architecture of the host computer, such as a computer system having a PowerPC processor, mimics the operation of the entire guest computer system.
The emulator program acts as the interchange between the hardware architecture of the host machine and the instructions transmitted by the software running within the emulated environment. This emulator program may be a host operating system (HOS), which is an operating system running directly on the physical computer hardware. Alternately, the emulated environment might also be a virtual machine monitor (VMM) which is a software layer that runs directly above the hardware and which virtualizes all the resources of the machine by exposing interfaces that are the same as the hardware the VMM is virtualizing (which enables the VMM to go unnoticed by operating system layers running above it). A host operating system and a VMM may run side-by-side on the same physical hardware.
Processors typically offer at least two instruction privilege levels, for example, a privileged mode and a user mode. Software running in privileged mode (that is, trusted software) is able to access privileged processor resources, including registers, modes, settings, in-memory data structures, and so forth. In contrast, user mode is intended for untrusted software that performs the majority of the computational work in a modern system. Many processors (but not all) make a strict distinction between user-level state and privileged-level state (corresponding to each mode), and access to privileged-level state is not allowed when the processor is operating in user mode. This distinction allows the host operating system (or its equivalent) to protect key resources and prevent a buggy or malicious piece of user-level software from crashing the entire system.
In a virtual machine environment, the VMM prevents the virtualized code from “taking over” the system by differentiating between privileged-level and user-level operations (i.e., software that accesses privileged-level processor resources versus user-level resources). For the most part, the VMM is able to hide the fact that code intended to be run at privileged-level is actually executing at user-level. More specifically, this illusion that allows privileged-level code to run at user-level is maintained by privileged operations, which are generated by the guest OS, being caught by the VMM and passed on to the guest's trap handlers, i.e., exception handlers (the terms trap handler or exception handler are used interchangeably). As known by one skilled in the art, a trap handler (or exception handler) executes a set of routines that are used to detect deadlock conditions or to process abnormal conditions. A trap handler allows the normal running of processes to be interrupted and resumed.
The execution of privileged-level code in a virtual machine environment, however, involves running privileged-level code of the guest OS at user-level, despite the fact that privileged-level code is written with the assumption that it will have full access to all privileged state elements of the processor. To reconcile this, the virtual machine relies on the processor to generate a trap for all privileged instructions (i.e., instructions that directly or indirectly access the privileged state). The privilege violation trap invokes a trap handler within the VMM. The VMM's trap handler then emulates the implied state changes of the privileged instruction and returns control back to the subsequent instruction. This emulation of a privileged instruction often involves the use of a shadow state that is private to a particular VM instance. For example, if a processor architecture includes a privileged mode register (PMR), which can only be accessed in privileged mode, any attempt to read from or write to the PMR from user-level code would cause a trap. The VMM's trap handler determines the cause of the trap and refers to a PMR shadow value that is private to the instance of the associated VM.
There is significant overhead associated with the VMM's handling each exception event. Therefore, the overall overhead of the VM is determined by how often these privileged-level instructions are executed by the guest OS, each of which causes a trap for which the VMM emulates that instruction, all of which takes time. It also takes time for the physical hardware to generate the trap in the first place. As a result, a privileged-level instruction that normally may have used only one processor cycle now may use thousands of processor cycles. What is needed is a way to reduce the overhead caused by exception handling in a virtual machine and thereby provide improved performance in the virtual machine environment.
Another scenario that adversely affects VM performance is the case in which an exception cannot be handled entirely in the context of the VM environment. More specifically, some of the operations in the VM invoke services on the host OS, for example, a request to read from a disk. In order to execute this request, a “context switch” must occur from the VM context to the host context. Like trap handling, performing the “context switch” is very expensive, i.e., requires thousands of additional processor cycles. What is needed is a way to reduce the overhead caused by a “context switch” in a virtual machine and thereby provide improved performance in the virtual machine environment.